1/9 april 2001 STP90NF03L stb90nf03l-1 n-channel 30v - 0.0056 w - 90a to-220/i 2 pak low gate charge stripfet? power mosfet n typical r ds (on) = 0.0056 w n typical q g = 35 nc @ 5v n optimal r ds (on) x q g trade-off n conduction losses reduced n switching losses reduced description this application specific power mosfet is the third generation of stmicroelectronics unique single feature size ? strip-based process. the resulting transistor shows the best trade-off between on-re- sistance and gate charge. when used as high and low side in buck regulators, it gives the best perfor- mance in terms of both conduction and switching losses. this is extremely important for mother- boards where fast switching and high efficiency are of paramount importance. applications n specifically designed and optimised for high efficiency cpu core dc/dc converters absolute maximum ratings ( l ) pulse width limited by safe operating area type v dss r ds(on) i d STP90NF03L stb90nf03l-1 30 v 30 v < 0.0065 w < 0.0065 w 90 a 90 a symbol parameter value unit v ds drain-source voltage (v gs = 0) 30 v v dgr drain-gate voltage (r gs = 20 k w ) 30 v v gs gate- source voltage 20 v i d drain current (continuos) at t c = 25c 90 a i d drain current (continuos) at t c = 100c 65 a i dm ( l ) drain current (pulsed) 360 a p tot total dissipation at t c = 25c 150 w derating factor 0.73 w/c t stg storage temperature C65 to 175 c t j max. operating junction temperature 175 c to-220 1 2 3 1 2 3 i 2 pak internal schematic diagram
STP90NF03L/stb90nf03l-1 2/9 thermal data electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-case thermal resistance junction-case max 1 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 30 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 1 2.5 v r ds(on) static drain-source on resistance v gs = 10v, i d = 45 a 0.0056 0.0065 w v gs = 5v, i d = 45 a 0.007 0.012 w i d(on) on state drain current v ds > i d(on) x r ds(on)max, v gs =10v 90 a symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > i d(on) x r ds(on)max, i d = 45 a 40 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 2700 pf c oss output capacitance 860 pf c rss reverse transfer capacitance 170 pf
3/9 STP90NF03L/stb90nf03l-1 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 15v, i d = 45 a r g = 4.7 w v gs = 4.5 v (see test circuit, figure 3) 30 ns t r rise time 200 ns q g total gate charge v dd = 24v, i d = 90 a,v gs = 5v 35 47 nc q gs gate-source charge 10 nc q gd gate-drain charge 18 nc symbol parameter test conditions min. typ. max. unit t d(off) turn-off-delay time v dd = 1 5v, i d = 45 a, r g =4.7 w, v gs = 4.5 v (see test circuit, figure 3) 50 ns t f fall time 105 ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 90 a i sdm (2) source-drain current (pulsed) 360 a v sd (1) forward on voltage i sd = 90 a, v gs = 0 1.3 v t rr reverse recovery time i sd = 90 a, di/dt = 100a/s, v dd = 15v, t j = 150c (see test circuit, figure 5) 80 ns q rr reverse recovery charge 90 nc i rrm reverse recovery current 2.5 a thermal impedence safe operating area
STP90NF03L/stb90nf03l-1 4/9 gate charge vs gate-source voltage capacitance variations transconductance static drain-source on resistance output characteristics transfer characteristics
5/9 STP90NF03L/stb90nf03l-1 source-drain diode forward characteristics normalized on resistance vs temperature normalized gate thereshold voltage vs temp.
STP90NF03L/stb90nf03l-1 6/9 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
7/9 STP90NF03L/stb90nf03l-1 dim. mm inch min. typ. max. min. typ. max. a 4.40 4.60 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 d1 1.27 0.050 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.4 2.7 0.094 0.106 h2 10.0 10.40 0.393 0.409 l2 16.4 0.645 l4 13.0 14.0 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.2 6.6 0.244 0.260 l9 3.5 3.93 0.137 0.154 dia. 3.75 3.85 0.147 0.151 l6 a c d e d1 f g l7 l2 dia. f1 l5 l4 h2 l9 f2 g1 to-220 mechanical data p011c
STP90NF03L/stb90nf03l-1 8/9 dim. mm inch min. typ. max. min. typ. max. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 b 0.7 0.93 0.027 0.036 b2 1.14 1.7 0.044 0.067 c 0.45 0.6 0.017 0.023 c2 1.23 1.36 0.048 0.053 d 8.95 9.35 0.352 0.368 e 2.4 2.7 0.094 0.106 e 10 10.4 0.393 0.409 l 13.1 13.6 0.515 0.531 l1 3.48 3.78 0.137 0.149 l2 1.27 1.4 0.050 0.055 l l1 b2 b d e a c2 c a1 l2 e p011p5/e to-262 (i 2 pak) mechanical data
9/9 STP90NF03L/stb90nf03l-1 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectroni cs. specifi cation mentio ned in this publication are subject to change without notice. this publication supersedes and replaces all in formation previou sly supplied. stmicroel ectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a trademark of stmicroelectronics ? 2001 stmicroelectronics C pr inted in italy C all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malay sia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com
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